SENG 2004-02-17


Frequently Asked Questions (digital logic kernel)

Why is the PC parallel port used and not USB or ... ?
The PC parallel port is the only external available PC interface able to control an external device, that does not contain a pre-programmed or specialized integrated circuit. This interface is primarily for development and administrative purposes but can also be used with the finished product, that may has additional interfaces. This interface allows a device to boot up the very first time and to become ´alive´, without depending on programming devices or special integrated circuits, and without the need to program a specialized boot sequence. Furthermore it adds costs of only a few Cents to the product.

Does the parallel port connector or the entire interface always has to be part of the ´dlk´ board ?
No, pads for a needle adaptor or a miniaure connector are sufficient. However in both cases an external, simple passive adaptor is needed to interface with the PC.

Is ´dlk´ solely possible with Xilinx semiconductors ?
It also can be done with others, but at the early times of FPGA´s Xilinx was the only one. During all those years we saw no reason to move to another manufacturer. We could use another manufacturer, if the customer pays for development costs.

Which FPGA component families are suitable for ´dlk´ ?
All, but using Spartan-II devices is the easy way. Spartan-II is the latest and most inexpensive component family from Xilinx that includes 5V tolerant I/O´s. This offers advantages when interfacing to the PC parallel port, none 5V tolerant component families would require some adjustments. In industry and automobile applications 5V tolerance is also demanded.

Can ´dlk´ consist of more than one FPGA, and is it possible to reconfigure them dynamically ?
At the I/O's  of the ´dlk´ as many as desired FPGA's can be attached and configured. The ´dlk´ is the bootable kernel, that can be done without pre-programming and special parts. The parts (FPGA´s) surrounding the ´dlk´ are independent from device technology and manufacturer. Those parts can communicate with each other and with the ´dlk´ and use it´s ressources, especially it´s communication channel to the PC and it´s integrated flash-memory and JTAG ressources. The ´dlk´ can dynamically reconfigure those peripherals at run-time without system restart or interrupting the data transfer to and from the PC.
The developping cost are substantially smaller than those of single chip dynamically reconfigurable FPGA systems. There is no need to do special partitioning, placing and routing. All FPGA devices from any supplier, meaning just the device that fits the application, can be used

Can FPGA´s be used to build a rugged product ?
Yes, we used this technology very successfully, realizing portable measuring instruments for car and truck development.

Is this a turning away from standard modules ?
Yes and no.
No, have a look at our ´dlk51´ module. It´s a standard module - just more flexible and easier to handle, than those we were used to. Other standard modules will follow. Inflexible, today used modules can easily be changed to ´dlk´ modules. Using our development tools, the expenditure for this is minimal.
Yes, because with FPGA based modules, every module looks the same, but inside functionality can be completely different.
Products do not only consist of the digital part, there is almost always a user and/or an analog interface. And most times these interfaces are the most important things. So it is almost always necessary to build a special PCB, that holds all those functions that are special for the application. Building a device out of a sum of ´approved´ modules does not automatically give an approved product. So we think with todays tools it is better to build a device on a single board with reconfigurable kernel. The market for traditional modules becomes smaller.

Which processors can be integrated into a ´dlk´ system ?
Necessary characteristics:
  1. tristate capable bus structure, i.e. the processor must be able to release its external bus on an exterior signal
  2. reset input
  3. LVTTL compatibility
Desirable characteristics:
  1. external boot memory
  2. byte-wide boot memory
The bus width of the CPU is not important. A soft CPU realized within the FPGA is possible, developping costs and unit price will make the decision. So most times it is not a good idea to realize an incomplete 8032 CPU inside an FPGA, occupy 12 Euro of FPGA ressources, and in extra having to pay licenses for the CPU macro.

Why is the first implementation an 8051 based board ?
It is the most popular CPU, lots of development tools and program sources are available free of charge. High quality C-compiler (SDCC, under GPL license) and program examples are provided. The system can be used ´out of the box´.

Are there other demo boards ?
we thought of developing systems with the 16-bit Fujitsu 16LX and the 32-bit hyperstone CPU, but the customer can tell what he wants to...

Is it hard to make the first steps ?
No. A demo board is available, application support and development services are offered. It´s an open system, source code is completely available.