2005-01-14

Home Products dlk System kit Concept Elements PC-interface JTAG emulation Boot-logic Software Driver Demo board Info area Downloads

dlk - PC interface The parallel PC printer interface is realized by an FPGA macro and some external passive components. The interface serves for systems administration and fast data exchange with the PC. the macro converts the PC printer interface within the FPGA to an 8-bit wide data/address-bus with /RD and /WR signal automatic adjustment to SPP, PS2 and EPP interface operation modes 4 MBit/sec (512 KByte/sec) data transfer rate at EPP mode occupies only 51 slices (102 flip-flops), approx. 7% of an xc2s50 FPGA program and functional support via DLL, based on C source code FPGA macro and program sources for interface supply are completely available in source code format.